Class information for:
Level 1: TEST DATA COMPRESSION//TRANSITION FAULTS//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Basic class information
Class id #P Avg. number of
references		 Database coverage
of references
1955 2409 21.1 38%


Bar chart of Publication_year

Last years might be incomplete

Hierarchy of classes
The table includes all classes above and classes immediately below the current class.


Cluster id Level Cluster label #P
9 4 COMPUTER SCIENCE, THEORY & METHODS//COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE//COMPUTER SCIENCE, INFORMATION SYSTEMS 1247339
264 3       COMPUTER SCIENCE, HARDWARE & ARCHITECTURE//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//ENGINEERING, ELECTRICAL & ELECTRONIC 44494
752 2             JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//SOFT ERROR 12428
1955 1                   TEST DATA COMPRESSION//TRANSITION FAULTS//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2409

Terms with highest relevance score


rank Term termType Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 TEST DATA COMPRESSION authKW 1192465 4% 97% 97
2 TRANSITION FAULTS authKW 913171 3% 97% 74
3 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS journal 834733 23% 12% 565
4 JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS journal 826750 11% 25% 265
5 DELAY TESTING authKW 790934 3% 79% 79
6 DESIGN FOR TESTABILITY authKW 704795 5% 45% 123
7 TEST GENERATION authKW 668313 5% 45% 118
8 BUILT IN SELF TEST authKW 557957 4% 41% 107
9 LOW POWER TESTING authKW 528221 2% 89% 47
10 PATH DELAY FAULTS authKW 457518 2% 95% 38

Web of Science journal categories


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with term
in class
1 Computer Science, Hardware & Architecture 288191 61% 2% 1476
2 Engineering, Electrical & Electronic 43856 77% 0% 1859
3 Computer Science, Interdisciplinary Applications 19423 24% 0% 589
4 Computer Science, Software Engineering 4933 11% 0% 261
5 Computer Science, Information Systems 2189 8% 0% 201
6 Computer Science, Theory & Methods 1954 8% 0% 203
7 COMPUTER APPLICATIONS & CYBERNETICS 675 0% 0% 12
8 Automation & Control Systems 166 2% 0% 51
9 Instruments & Instrumentation 104 3% 0% 71
10 Telecommunications 17 1% 0% 33

Address terms


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 COMP AIDED DESIGN TEST GRP 164758 1% 100% 13
2 ELECT SYST DESIGN GRP 46779 0% 31% 12
3 RELIABLE HIGH PERFORMANCE COMP 45240 1% 24% 15
4 ELECT DESIGN COMMUN COMP 38021 0% 100% 3
5 FAULT TOLERANT COMP GRP 31679 0% 50% 5
6 IC DESIGN DIGITAL DESIGN TEST 28965 0% 57% 4
7 COMP ARCHITECTURE COMP ENGN 28798 0% 45% 5
8 COMP DESIGN TEST 28514 0% 75% 3
9 DST INFORMAT 25347 0% 100% 2
10 ENCOUNTER TEST 25347 0% 100% 2

Journals


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 834733 23% 12% 565
2 JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS 826750 11% 25% 265
3 IEEE DESIGN & TEST OF COMPUTERS 281581 6% 15% 148
4 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 110570 7% 5% 172
5 IEEE TRANSACTIONS ON COMPUTERS 105967 9% 4% 208
6 IET COMPUTERS AND DIGITAL TECHNIQUES 105267 2% 14% 60
7 ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS 68640 3% 8% 64
8 IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES 24051 1% 5% 36
9 IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 22823 4% 2% 104
10 INTEGRATION-THE VLSI JOURNAL 17508 2% 4% 37

Author Key Words


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class		 LCSH search Wikipedia search
1 TEST DATA COMPRESSION 1192465 4% 97% 97 Search TEST+DATA+COMPRESSION Search TEST+DATA+COMPRESSION
2 TRANSITION FAULTS 913171 3% 97% 74 Search TRANSITION+FAULTS Search TRANSITION+FAULTS
3 DELAY TESTING 790934 3% 79% 79 Search DELAY+TESTING Search DELAY+TESTING
4 DESIGN FOR TESTABILITY 704795 5% 45% 123 Search DESIGN+FOR+TESTABILITY Search DESIGN+FOR+TESTABILITY
5 TEST GENERATION 668313 5% 45% 118 Search TEST+GENERATION Search TEST+GENERATION
6 BUILT IN SELF TEST 557957 4% 41% 107 Search BUILT+IN+SELF+TEST Search BUILT+IN+SELF+TEST
7 LOW POWER TESTING 528221 2% 89% 47 Search LOW+POWER+TESTING Search LOW+POWER+TESTING
8 PATH DELAY FAULTS 457518 2% 95% 38 Search PATH+DELAY+FAULTS Search PATH+DELAY+FAULTS
9 TEST COMPRESSION 450613 2% 89% 40 Search TEST+COMPRESSION Search TEST+COMPRESSION
10 SCAN TESTING 438130 2% 79% 44 Search SCAN+TESTING Search SCAN+TESTING

Core articles
The table includes core articles in the class. The following variables is taken into account for the relevance score of an article in a cluster c:
(1) Number of references referring to publications in the class.
(2) Share of total number of active references referring to publications in the class.
(3) Age of the article. New articles get higher score than old articles.
(4) Citation rate, normalized to year.


Rank Reference # ref.
in cl.		 Shr. of ref. in
cl.		 Citations
1 SIVANANTHAM, S , PADMAVATHY, M , GOPAKUMAR, G , MALLICK, PS , PERINBAM, JRP , (2014) ENHANCEMENT OF TEST DATA COMPRESSION WITH MULTISTAGE ENCODING.INTEGRATION-THE VLSI JOURNAL. VOL. 47. ISSUE 4. P. 499 -509 31 100% 2
2 XIANG, D , ZHAO, Y , CHAKRABARTY, K , FUJIWARA, H , (2008) RECONFIGURABLE SCAN ARCHITECTURE WITH WEIGHTED SCAN-ENABLE SIGNALS FOR DETERMINISTIC BIST.IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. VOL. 27. ISSUE 6. P. 999 -1012 34 100% 8
3 YUAN, HY , GUO, K , SUN, X , JU, ZJ , (2016) A POWER EFFICIENT TEST DATA COMPRESSION METHOD FOR SOC USING ALTERNATING STATISTICAL RUN-LENGTH CODING.JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS. VOL. 32. ISSUE 1. P. 59 -68 24 100% 1
4 SIVANANTHAM, S , MALLICK, PS , PERINBAM, JRP , (2014) LOW-POWER SELECTIVE PATTERN COMPRESSION FOR SCAN-BASED TEST APPLICATIONS.COMPUTERS & ELECTRICAL ENGINEERING. VOL. 40. ISSUE 4. P. 1053 -1063 23 100% 1
5 WU, TB , LIU, HZ , LIU, PX , (2013) EFFICIENT TEST COMPRESSION TECHNIQUE FOR SOC BASED ON BLOCK MERGING AND EIGHT CODING.JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS. VOL. 29. ISSUE 6. P. 849 -859 23 100% 5
6 KAVOUSIANOS, X , KALLIGEROS, E , NIKOLOS, D , (2007) MULTILEVEL HUFFMAN CODING: AN EFFICIENT TEST-DATA COMPRESSION METHOD FOR IP CORES.IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. VOL. 26. ISSUE 6. P. 1070 -1083 26 100% 23
7 TENENTES, V , KAVOUSIANOS, X , (2013) HIGH-QUALITY STATISTICAL TEST COMPRESSION WITH NARROW ATE INTERFACE.IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. VOL. 32. ISSUE 9. P. 1369 -1382 24 96% 3
8 VOHRA, H , SINGH, A , (2016) OPTIMAL SELECTIVE COUNT COMPATIBLE RUNLENGTH ENCODING FOR SOC TEST DATA COMPRESSION.JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS. VOL. 32. ISSUE 6. P. 735 -747 23 92% 0
9 MUKHERJEE, N , RAJSKI, J , SZCZERBICKI, P , TYSZER, J , CZYSZ, D , MRUGALSKI, G , (2011) DETERMINISTIC CLUSTERING OF INCOMPATIBLE TEST CUBES FOR HIGHER POWER-AWARE EDT COMPRESSION.IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. VOL. 30. ISSUE 8. P. 1225 -1238 22 100% 17
10 WU, TB , LIU, HZ , ZHANG, BT , (2014) A NOVEL TEST DATA COMPRESSION SCHEME FOR SOCS BASED ON BLOCK MERGING AND COMPATIBILITY.IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES. VOL. E97A. ISSUE 7. P. 1452 -1460 21 100% 0

Classes with closest relation at Level 1


Rank Class id link
1 20981 SOFTWARE BASED SELF TEST//FUNCTIONAL VERIFICATION//POST SILICON VALIDATION
2 25434 AMBITUS//CMOS TRANSISTOR NETWORKS//COMP BUSINESS GRP
3 18911 SELF CHECKING CIRCUITS//ITERATIVE LOGIC ARRAYS//CONCURRENT ERROR DETECTION
4 17996 STATE ASSIGNMENT//LOGIC SYNTHESIS//LOGIC OPTIMIZATION
5 17275 MARCH TEST//MEMORY TESTING//BUILT IN SELF REPAIR BISR
6 8660 JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS//MIXED SIGNAL TEST//ANALOG TEST
7 13875 HIGH LEVEL SYNTHESIS//BEHAVIORAL SYNTHESIS//DATAPATH SYNTHESIS
8 30433 RETIMING//CLOCK SCHEDULING//SEMI SYNCHRONOUS CIRCUIT
9 17444 REED MULLER EXPANSION//REED MULLER TRANSFORM//AND EXOR
10 14808 ORDERED BINARY DECISION DIAGRAMS//BINARY DECISION DIAGRAMS//BRANCHING PROGRAMS

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