Class information for:
Level 1: REGISTER ALLOCATION//INSTRUCTION SCHEDULING//INSTRUCTION LEVEL PARALLELISM

Basic class information
Class id #P Avg. number of
references		 Database coverage
of references
10145 1088 22.9 23%


Bar chart of Publication_year

Last years might be incomplete

Hierarchy of classes
The table includes all classes above and classes immediately below the current class.


Cluster id Level Cluster label #P
9 4 COMPUTER SCIENCE, THEORY & METHODS//COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE//COMPUTER SCIENCE, INFORMATION SYSTEMS 1247339
148 3       COMPUTER SCIENCE, SOFTWARE ENGINEERING//COMPUTER SCIENCE, THEORY & METHODS//ACM SIGPLAN NOTICES 63683
1913 2             ACM SIGPLAN NOTICES//GARBAGE COLLECTION//REGISTER ALLOCATION 5878
10145 1                   REGISTER ALLOCATION//INSTRUCTION SCHEDULING//INSTRUCTION LEVEL PARALLELISM 1088

Terms with highest relevance score


rank Term termType Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 REGISTER ALLOCATION authKW 2044808 9% 72% 101
2 INSTRUCTION SCHEDULING authKW 1247374 6% 67% 66
3 INSTRUCTION LEVEL PARALLELISM authKW 889674 7% 45% 71
4 SOFTWARE PIPELINING authKW 742254 4% 58% 46
5 VLIW authKW 484905 4% 40% 43
6 REGISTER COALESCING authKW 224512 1% 100% 8
7 CODE SCHEDULING authKW 206650 1% 82% 9
8 SPILL CODE authKW 206650 1% 82% 9
9 QUEUE PROCESSOR authKW 196448 1% 100% 7
10 MODULO SCHEDULING authKW 182403 1% 50% 13

Web of Science journal categories


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 Computer Science, Hardware & Architecture 51605 39% 0% 421
2 Computer Science, Software Engineering 47893 48% 0% 526
3 Computer Science, Theory & Methods 18471 36% 0% 391
4 Engineering, Electrical & Electronic 1383 23% 0% 246
5 Computer Science, Information Systems 947 8% 0% 89
6 Computer Science, Interdisciplinary Applications 44 2% 0% 26
7 COMPUTER APPLICATIONS & CYBERNETICS 39 0% 0% 2
8 Computer Science, Artificial Intelligence 35 2% 0% 23
9 Logic 12 0% 0% 3
10 Operations Research & Management Science 8 1% 0% 12

Address terms


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 SOC DESIGN TECH 56128 0% 100% 2
2 PROGRAMMING LANGUAGES COMPILERS GRP 48101 1% 29% 6
3 EDUC COMP SCI ELECT ENGN 37417 0% 67% 2
4 SUPERCOMP EDN 37417 0% 67% 2
5 AQUITECTURA COMP 28064 0% 100% 1
6 ARQUITECTURQA COMP 28064 0% 100% 1
7 CENT RD EMBEDDED SYST TECHNOL 28064 0% 100% 1
8 CG TECHNOL 28064 0% 100% 1
9 COMPUTING SYST ARCHTICTURE 28064 0% 100% 1
10 DESIGN COMPILER GRP 28064 0% 100% 1

Journals


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 ACM SIGPLAN NOTICES 75383 10% 2% 114
2 SIGPLAN NOTICES 71363 6% 4% 66
3 INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 63346 4% 6% 40
4 ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION 54454 3% 7% 29
5 IEEE MICRO 31497 3% 3% 37
6 MICROPROCESSING AND MICROPROGRAMMING 28900 3% 3% 34
7 ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS 27101 3% 3% 30
8 IEEE TRANSACTIONS ON COMPUTERS 16360 5% 1% 55
9 MICROPROCESSORS AND MICROSYSTEMS 8467 2% 1% 23
10 DESIGN AUTOMATION FOR EMBEDDED SYSTEMS 8371 1% 3% 9

Author Key Words


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class		 LCSH search Wikipedia search
1 REGISTER ALLOCATION 2044808 9% 72% 101 Search REGISTER+ALLOCATION Search REGISTER+ALLOCATION
2 INSTRUCTION SCHEDULING 1247374 6% 67% 66 Search INSTRUCTION+SCHEDULING Search INSTRUCTION+SCHEDULING
3 INSTRUCTION LEVEL PARALLELISM 889674 7% 45% 71 Search INSTRUCTION+LEVEL+PARALLELISM Search INSTRUCTION+LEVEL+PARALLELISM
4 SOFTWARE PIPELINING 742254 4% 58% 46 Search SOFTWARE+PIPELINING Search SOFTWARE+PIPELINING
5 VLIW 484905 4% 40% 43 Search VLIW Search VLIW
6 REGISTER COALESCING 224512 1% 100% 8 Search REGISTER+COALESCING Search REGISTER+COALESCING
7 CODE SCHEDULING 206650 1% 82% 9 Search CODE+SCHEDULING Search CODE+SCHEDULING
8 SPILL CODE 206650 1% 82% 9 Search SPILL+CODE Search SPILL+CODE
9 QUEUE PROCESSOR 196448 1% 100% 7 Search QUEUE+PROCESSOR Search QUEUE+PROCESSOR
10 MODULO SCHEDULING 182403 1% 50% 13 Search MODULO+SCHEDULING Search MODULO+SCHEDULING

Core articles
The table includes core articles in the class. The following variables is taken into account for the relevance score of an article in a cluster c:
(1) Number of references referring to publications in the class.
(2) Share of total number of active references referring to publications in the class.
(3) Age of the article. New articles get higher score than old articles.
(4) Citation rate, normalized to year.


Rank Reference # ref.
in cl.		 Shr. of ref. in
cl.		 Citations
1 KATHAIL, V , SCHLANSKER, MS , RAU, BR , (2001) COMPILING FOR EPIC ARCHITECTURES.PROCEEDINGS OF THE IEEE. VOL. 89. ISSUE 11. P. 1676 -1693 20 100% 2
2 KESSLER, C , ERIKSSON, M , (2012) INTEGRATED CODE GENERATION FOR LOOPS.ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS. VOL. 11. ISSUE 1. P. - 13 93% 3
3 BARIK, R , ZHAO, JS , SARKAR, V , (2013) A DECOUPLED NON-SSA GLOBAL REGISTER ALLOCATION USING BIPARTITE LIVENESS GRAPHS.ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION. VOL. 10. ISSUE 4. P. - 14 82% 0
4 HUANG, YZ , ZHAO, MY , XUE, CJ , (2012) WCET-AWARE RE-SCHEDULING REGISTER ALLOCATION FOR REAL-TIME EMBEDDED SYSTEMS WITH CLUSTERED VLIW ARCHITECTURE.ACM SIGPLAN NOTICES. VOL. 47. ISSUE 5. P. 31 -40 12 92% 4
5 JANTZ, MR , KULKARNI, PA , (2014) ANALYZING AND ADDRESSING FALSE INTERACTIONS DURING COMPILER OPTIMIZATION PHASE ORDERING.SOFTWARE-PRACTICE & EXPERIENCE. VOL. 44. ISSUE 6. P. 643-679 13 81% 1
6 RAU, BR , FISHER, JA , (1993) INSTRUCTION-LEVEL PARALLEL-PROCESSING - HISTORY, OVERVIEW, AND PERSPECTIVE.JOURNAL OF SUPERCOMPUTING. VOL. 7. ISSUE 1-2. P. 9-50 23 77% 89
7 KESSLER, C , BEDNARSKI, A , ERIKSSON, M , (2007) CLASSIFICATION AND GENERATION OF SCHEDULES FOR VLIW PROCESSORS.CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE. VOL. 19. ISSUE 18. P. 2369 -2389 12 100% 1
8 KIM, DH , LEE, HJ , (2010) FINE-GRAIN REGISTER ALLOCATION AND INSTRUCTION SCHEDULING IN A REFERENCE FLOW(1).COMPUTER JOURNAL. VOL. 53. ISSUE 6. P. 717 -740 11 100% 1
9 MELEIS, WM , (2001) DUAL-ISSUE SCHEDULING OR BINARY TREES WITH SPILLS AND PIPELINED LOADS.SIAM JOURNAL ON COMPUTING. VOL. 30. ISSUE 6. P. 1921 -1941 14 100% 2
10 COLOMBET, Q , BRANDNER, F , (2013) ELIMINATION OF PARALLEL COPIES USING CODE MOTION ON DATA DEPENDENCE GRAPHS.COMPUTER LANGUAGES SYSTEMS & STRUCTURES. VOL. 39. ISSUE 1. P. 25 -47 11 85% 0

Classes with closest relation at Level 1


Rank Class id link
1 14525 CODE COMPRESSION//BINARY TRANSLATION//DYNAMIC BINARY TRANSLATION
2 23856 A CONTROLLER INTIMATELY TIED TO THE OPERATION OF A SINGLE STORAGE DEVICE//A CONTROLLER OVERSEEING THE OPERATION OF ONE OR MORE DEVICES SIMULTANEOUSLY//A THIN DISK TYPICALLY ALUMINUM COATED WITH MAGNETIC MATERIAL
3 12130 POINTER ANALYSIS//POINTS TO ANALYSIS//PARTIAL REDUNDANCY ELIMINATION
4 4186 BRANCH PREDICTION//THREAD LEVEL SPECULATION//ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
5 4952 PARALLELIZING COMPILERS//LOOP TRANSFORMATIONS//AUTOMATIC PARALLELIZATION
6 14669 PARALLEL MEMORY//SUBWORD PARALLELISM//STORAGE SCHEMES
7 30433 RETIMING//CLOCK SCHEDULING//SEMI SYNCHRONOUS CIRCUIT
8 13875 HIGH LEVEL SYNTHESIS//BEHAVIORAL SYNTHESIS//DATAPATH SYNTHESIS
9 35181 MULTITHREADED COMPUTERS//BLOCK MULTITHREADING//EDINBURGH DATA INTENS GRP
10 8485 RECONFIGURABLE COMPUTING//ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS//RECONFIGURABLE ARCHITECTURES

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