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IL2201 Design of Digital Integrated Circuits - VLSI 7.5 credits

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Information per course offering

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Course syllabus as PDF

Please note: all information from the Course syllabus is available on this page in an accessible format.

Course syllabus IL2201 (Autumn 2008–)
Headings with content from the Course syllabus IL2201 (Autumn 2008–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

Deep submicron phenomena. Interconnect scaling and interconnectivity constraints. Interconnects on silicon. Noise in digital systems and noise budgeting. Crosstalk. Power distribution design. Signalling conventions. Noise immunity vs. Noise margin. On-chip and off-chip signalling strategies. Timing fundamentals. Timing uncertainty. Synchronous and pipelined timing conventions. Clock distribution strategies. Signalling and timing circuits. Power optimization in signalling and timing.

Intended learning outcomes

The course is intended to give the student an understanding of the fundamental system level electrical issues involved in the design of digital deep submicron CMOS VLSI systems and a mastery of the basic techniques and methods used to deal with these issues. The key focus in this course is on impact of interconnects (metal Al or Cu wires) to circuit and system properties. Issues related to interconnects will be introduced in the areas of power distribution, signalling, timing, synchronization, noise-management, and related chip power consumption minimization. In each area, the fundamental problems will be introduced and engineering architecture and circuit solutions to these problems discussed. The above-mentioned issues will define how price and performance competitive and reliable the designed VLSI circuits and related end-product systems will be for the end user.

Literature and preparations

Specific prerequisites

No information inserted

Literature

William J. Dally: Digital System Engineering , Cambridge University Press, ISBN 0-521-59292-5

Examination and completion

Grading scale

A, B, C, D, E, FX, F

Examination

  • PRO1 - Project, 1.5 credits, grading scale: A, B, C, D, E, FX, F
  • TEN1 - Examination, 3.0 credits, grading scale: A, B, C, D, E, FX, F
  • LAB1 - Laboratory Course, 3.0 credits, grading scale: P, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

If the course is discontinued, students may request to be examined during the following two academic years.

Other requirements for final grade

Examination (TEN1; 3 hp)
Laboratory course (LAB1; 3.hp)
Project (PRO1; 1,5.hp)

Examiner

No information inserted

Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course room in Canvas

Registered students find further information about the implementation of the course in the course room in Canvas. A link to the course room can be found under the tab Studies in the Personal menu at the start of the course.

Offered by

ICT/Electronic Systems

Education cycle

Second cycle

Supplementary information

http://www.ict.kth.se/courses/IL2201/