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IL1332 Digital Systems Design using Hardware Description Languages 7.5 credits

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Information per course offering

Termin

Information for Autumn 2024 Start 26 Aug 2024 programme students

Course location

KTH Kista

Duration
26 Aug 2024 - 27 Oct 2024
Periods
P1 (7.5 hp)
Pace of study

50%

Application code

50122

Form of study

Normal Daytime

Language of instruction

English

Course memo
Course memo is not published
Number of places

Places are not limited

Target group

Open to all programmes as long as it can be included in your programme.

Planned modular schedule
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Contact

Examiner
No information inserted
Course coordinator
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Teachers
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Course syllabus as PDF

Please note: all information from the Course syllabus is available on this page in an accessible format.

Course syllabus IL1332 (Autumn 2023–)
Headings with content from the Course syllabus IL1332 (Autumn 2023–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

The course teaches digital systems design using hardware description language. Additionally, the course includes simulation and synthesis of digital systems designs targeting FPGAs.

  • Review of elementary digital design concepts and their modeling in HDL.
  • Review of sequential elements, timing concepts, and their applications. Modelling in HDL.
  • Design of finite state machines (FSMs) and datapaths.
  • Modeling of FSM and datapaths in HDL.

Intended learning outcomes

After passing the course, the student should be able to

  • design digital systems to fulfill given functional requirements
  • model and simulate digital systems in hardware description languages (HDL)
  • synthesize digital systems and analyze results using EDA tools targetting field programmable gate arrays (FPGAs).

Literature and preparations

Specific prerequisites

  • Knowledge in basic digital technology, 7,5 credits, corresponding to completed course IE1204.
  • Basic knowledge of the structure of microprocessors and instruction execution, 7,5 credits, corresponding to completed course IS1200.

Equipment

No information inserted

Literature

No information inserted

Examination and completion

If the course is discontinued, students may request to be examined during the following two academic years.

Grading scale

A, B, C, D, E, FX, F

Examination

  • LAB1 - Laboratory work, 3.0 credits, grading scale: P, F
  • TENA - Digital exam, 4.5 credits, grading scale: A, B, C, D, E, FX, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

Opportunity to complete the requirements via supplementary examination

No information inserted

Opportunity to raise an approved grade via renewed examination

No information inserted

Examiner

Profile picture Ahmed Hemani

Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course room in Canvas

Registered students find further information about the implementation of the course in the course room in Canvas. A link to the course room can be found under the tab Studies in the Personal menu at the start of the course.

Offered by

EECS/Electrical Engineering

Main field of study

Technology

Education cycle

First cycle

Add-on studies

No information inserted

Supplementary information

Overlaps completely with IL1331 and partially with IL2203 and IL2234.