Headings denoted with an asterisk ( * ) is retrieved from the course syllabus version Autumn 2021
Content and learning outcomes
Course contents
Introduction to hardware description languages
Introduction to general system design flow and implementation techniques; FPGAs versus ASICs
Modelling of digital systems by means of VHDL
Construction and analysis of combinatorial and sequential components
Asynchronous and synchronous state machines
The subset of VHDL that can be synthesized
Introduction to synthesis methodology
Synthesis for FPGAs
Microcontrollers/processors and data buses
Introduction to Verilog and SystemVerilog
Validation methods for embedded digital systems: Validation versus verification, randomised stimuli and constraints, code coverage, test coverage, regression test
Intended learning outcomes
After a passed course, the student should be able to
use hardware description languages to model digital hardware
mention and explain the different stages in the design flow for digital hardware
point out the subset of a hardware description language that can be synthesized
describe differences between the most common hardware description languages
describe different architectures for digital hardware implementation
design and validate digital hardware that is implemented on an FPGA
explain the fundamental functionality of a hardware description language for modelling and validation of digital hardware
use typical design and validation methods for combinatorial circuits, asynchronous and synchronous state machines and bus structures
describe the different validation stages of digital hardware.
Preparations before course start
Literature
No information inserted
Support for students with disabilities
Students at KTH with a permanent disability can get support during studies from Funka:
LAB1 - Laboratory work, 3.0 credits, Grading scale: P, F
LAB2 - Laboratory work, 1.5 credits, Grading scale: P, F
SEM1 - Seminars, 1.5 credits, Grading scale: P, F
TEN1 - Written exam, 3.0 credits, Grading scale: A, B, C, D, E, FX, F
Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.
The examiner may apply another examination format when re-examining individual students.
The section below is not retrieved from the course syllabus:
Laboratory work ( LAB1 )
Laboratory work ( LAB2 )
Seminars ( SEM1 )
Written exam ( TEN1 )
Ethical approach
All members of a group are responsible for the group's work.
In any assessment, every student shall honestly disclose any help received and sources used.
In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.
