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IS2202 Computer Systems Architecture 7.5 credits

The overall objective with the course is to give knowledge and insights into the design of modern computers, in particular the processor design including parallel computational pipelines and advanced memory hierarchies.

Information per course offering

Termin

Information for Spring 2025 Start 14 Jan 2025 programme students

Course location

KTH Kista

Duration
14 Jan 2025 - 16 Mar 2025
Periods
P3 (7.5 hp)
Pace of study

50%

Application code

60145

Form of study

Normal Daytime

Language of instruction

English

Course memo
Course memo is not published
Number of places

Places are not limited

Target group

Open to all programmes as long as it can be included in your programme

Planned modular schedule
[object Object]

Contact

Examiner
No information inserted
Course coordinator
No information inserted
Teachers
No information inserted

Course syllabus as PDF

Please note: all information from the Course syllabus is available on this page in an accessible format.

Course syllabus IS2202 (Spring 2019–)
Headings with content from the Course syllabus IS2202 (Spring 2019–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

  • Memory hiearchies, hardware for virtual memory management and memory protection
  • Software and hardware methods for utilizing instruction level parallelism
  • Orientation about thread level parallelism and hardware mechanisms to utilize thread level parallelism
  • Orientation about shared memory and memory coherence

Intended learning outcomes

The overall objective with the course is to give knowledge and insights into the design of modern computers, in particular the processor design including parallel computational pipelines and advanced memory hierarchies.

The student should, for a passing grade, be able to:

  • account for the basic quantitative principles of computer design,
  • explain the design and function of microprocessors with parallel computational pipelines and dynamic scheduling of instructions,
  • explain the design and function of a memory hierarchy for the above mentioned microprocessor,
  • explain the design and function of a multi-core processor with shared address space,
  • identify and predict a program behaviour favoured by a certain microarchitecture of a processor,
  • design and implement a simple parallel program with shared memory and explain its performance on a certain processor architecture with multiple cores,
  • describe how simulation can be used to evaluate different architectural alternatives,
  • propose and motivate a modification to a processor architecture which has potential to improve performance with the same power consumption,
  • propose and motivate a modification to a processor architecture which has potential to lower the power consumption with the same performance

Literature and preparations

Specific prerequisites

Bachelor's degree in computer science, electrical engineering or similar where basic couses in computer engineering and programming are included. 

Recommended prerequisites

Knowledge in computer organisation corresponding to IS1200 Computer Hardware Engineering.

Equipment

Access to own computer.

Literature

Kurslitteraturen fastställs senast en månad före kursstart och meddelas på kurshemsidan: http://www.ict.kth.se/courses/IS2202.

Examination and completion

If the course is discontinued, students may request to be examined during the following two academic years.

Grading scale

A, B, C, D, E, FX, F

Examination

  • LAB1 - Laboratory Work, 3.5 credits, grading scale: A, B, C, D, E, FX, F
  • TEN1 - Examination, 4.0 credits, grading scale: A, B, C, D, E, FX, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

Other requirements for final grade

Written exam (3,7 hp)
Laboratory exercises on own computer (3,7 hp)

The laboratory exercises may be accounted for orally or written. Peer review of written reports may occur.

The final course grade is a combination of the grade on the written exam and the laboratory exercises.

Opportunity to complete the requirements via supplementary examination

No information inserted

Opportunity to raise an approved grade via renewed examination

No information inserted

Examiner

Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course room in Canvas

Registered students find further information about the implementation of the course in the course room in Canvas. A link to the course room can be found under the tab Studies in the Personal menu at the start of the course.

Offered by

Main field of study

Computer Science and Engineering

Education cycle

Second cycle

Add-on studies

No information inserted

Supplementary information

In this course, the EECS code of honor applies, see: http://www.kth.se/en/eecs/utbildning/hederskodex.

Access to own computer.