Jacob Wahlgren

My research is focused on next-generation memory in large-scale parallel computing. Advances in this area can expand the possibilities of computing by improving performance and enabling efficient energy use. My work spans from hardware and architecture to operating systems and applications. In particular, I have explored how rack-scale memory pooling can make high-performance computing more efficient and affordable.

I am part of the ScaLab research group led by Prof. Ivy Peng.

My research interests include:

• Disaggregated memory
• Tiered memory
• High-performance computing
• Operating systems
• Computer architecture

News

• September 2024: The paper "Multi-level Memory-Centric Profiling on ARM Processors with ARM SPE" lead by our master's student Samuel Miksits was accepted to MEMO'24 International Workshop on Memory System, Management and Optimization held in conjunction with SC (Atlanta, USA). It is a continuation of my previous work on heterogeneous memory profiling.
• September 2024: Our paper "Disaggregated Memory with SmartNIC Offloading: a Case Study on Graph Processing" was accepted to SBAC-PAD 2024 (Hilo, USA)!
• November 2023: I presented a poster "Exploring Userspace Memory Mapping for RDMA-Enabled Network-Attached Memory" at SC 2023 (Denver, USA).
• June 2023: Our paper "A Quantitative Approach for Adopting Disaggregated Memory in HPC Systems" was accepted to SC 2023 (Denver, USA)! Acceptance rate: 24%.
• May 2023: I am honored to receive the Research Poster Award, 2nd place for our poster "HPC Applications on Disaggregated Memory Systems" at ISC 2023 (Hamburg, Germany)!
• September 2022: Our paper "Evaluating Emerging CXL-enabled Memory Pooling for HPC Systems" was accepted to the IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC'22) held in conjunction with SC (Dallas, USA).