Contributing to the development of embedded systems
Francesco Robino from Italy came to School of Information and Communication Technology as an exchange student for one year of master studies. After that he was enrolled as a PhD student and now he has finished his licentiate thesis "A model-based design approach for heterogeneous NoC-based MPSoCs on FPGA". In this interview he tells us more about his research.
Where are you from and where did you study before coming to KTH?
– I come from Turin in Italy. I received a BSs and a MSc degree in electronic engineering from Politecnico di Torino. During the last year of the master, I came to KTH School of ICT as exchange student for one year, studying some courses and preparing my master thesis.
What is your topic and why did you choose it?
– My research tackles problems in the area of embedded systems design methodologies. In the last years I focused on synthesis of model-based design to multi-processor systems-on-chip (MPSoCs) with network-on-chip (NoC) interconnection implemented on different FPGA technologies. I chose it because it gave me the possibility to contribute in the development of state-of-the-art MPSoC architectures for embedded systems, and because embedded systems are my great passion.
Describe your topic in short.
– Embedded systems functionality are often modelled as a network of intercommunicating processes/tasks. Unfortunately, these models are often based on an asynchronous communication mechanism and they are not defined formally, making their analysis and synthesis hard to achieve. A promising approach is the use of models of computation (MoCs) to formally describe the execution and communication semantics of processes through a set of rules. However, also when this formalization is used, there is no clear way to synthesize system-level models into software and hardware towards a NoC-based MPSoC implementation, in other words, there is a lack of system design automation (SDA) techniques to rapidly synthesize and prototype system-level models onto heterogeneous NoC-based MPSoCs. In order to tackle the problem, model-based SDA flows must be developed. This is exactly what I try to achieve with my research. Together with my research group, we have developed a SDA flow which starts from a system-level specification, where functions execute according to the synchronous MoC, and then it can rapidly synthesize and prototype the system onto an FPGA configured as an heterogeneous NoC-based MPSoC.
Tell us something about your results.
– Through the SDA flow that we developed, the designer is relieved from implementation details and the design time of systems targeting heterogeneous NoC-based MPSoCs on FPGA is significantly reduced. In addition, the flow reduces possible design errors proposing a completely automated technique for fast prototyping. Compared to other SDA flows, the proposed technique targets a bare-metal solution, avoiding the use of an operating system. This reduces the memory requirements on the FPGA platform comparing to related work targeting MPSoC on FPGA. At the same time, when using our methodology the performance of the applications can be increased when the number of processors of the target platform is increased.
What will the future bring for your research, how will you continue and what focus will you have on your PhD thesis?
– I personally believe that future embedded MPSoCs will contain many heterogeneous processing elements/components like different processor architectures and different accelerators. Consequently we are extending our synthesis methodology to generate and support more heterogeneous platforms. In addition, we want to extend the system-level description models supported by our synthesis flow. Finally, we would like to evaluate the performances of our design methodology through an industrial case study.
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