Class information for:
Level 1: DISTRIBUTED SHARED MEMORY//CACHE COHERENCE//SHARED MEMORY MULTIPROCESSORS

Basic class information
Class id #P Avg. number of
references		 Database coverage
of references
14139 789 22.2 24%


Bar chart of Publication_year

Last years might be incomplete

Hierarchy of classes
The table includes all classes above and classes immediately below the current class.


Cluster id Level Cluster label #P
9 4 COMPUTER SCIENCE, THEORY & METHODS//COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE//COMPUTER SCIENCE, INFORMATION SYSTEMS 1247339
20 3       COMPUTER SCIENCE, INFORMATION SYSTEMS//COMPUTER SCIENCE, THEORY & METHODS//COMPUTER SCIENCE, SOFTWARE ENGINEERING 118625
525 2             COMPUTER SCIENCE, THEORY & METHODS//GRID COMPUTING//PARALLEL COMPUTING 14974
14139 1                   DISTRIBUTED SHARED MEMORY//CACHE COHERENCE//SHARED MEMORY MULTIPROCESSORS 789

Terms with highest relevance score


rank Term termType Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 DISTRIBUTED SHARED MEMORY authKW 934960 8% 40% 60
2 CACHE COHERENCE authKW 681401 6% 39% 45
3 SHARED MEMORY MULTIPROCESSORS authKW 520918 4% 38% 35
4 CACHE COHERENCE PROTOCOLS authKW 237021 2% 44% 14
5 COHERENCE PROTOCOL authKW 174141 1% 50% 9
6 FALSE SHARING authKW 137591 1% 44% 8
7 SCALABLE COHERENT INTERFACE authKW 120934 1% 63% 5
8 COMPILER DIRECTED CACHE COHERENCE authKW 116100 0% 100% 3
9 DIRECTORY CACHE authKW 116100 0% 100% 3
10 PREFETCHING STRATEGY authKW 116100 0% 100% 3

Web of Science journal categories


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 Computer Science, Theory & Methods 36132 59% 0% 462
2 Computer Science, Hardware & Architecture 28772 34% 0% 268
3 Computer Science, Software Engineering 13805 31% 0% 242
4 Computer Science, Information Systems 1210 11% 0% 84
5 Engineering, Electrical & Electronic 909 22% 0% 171
6 Computer Science, Interdisciplinary Applications 191 5% 0% 38
7 COMPUTER APPLICATIONS & CYBERNETICS 127 0% 0% 3
8 Computer Science, Artificial Intelligence 27 2% 0% 17
9 Telecommunications 21 2% 0% 16
10 Automation & Control Systems 2 1% 0% 6

Address terms


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 HIGH PERFORMANCE COMP SIMULAT HCS 103197 1% 67% 4
2 HIGH PERFORMANCE INFORMAT SYST 88454 1% 57% 4
3 INRIA REM 77400 0% 100% 2
4 LEHRSTUHL RECHNERTECH RECHNERORGANISAT 51599 0% 67% 2
5 INGN TECNOL COMP 44932 1% 19% 6
6 ADV INTEGRATED SOLUT 38700 0% 100% 1
7 DC SSET 38700 0% 100% 1
8 DIGITAL COMPONENTS 38700 0% 100% 1
9 DPTO INFOMAT ING SISTEMAS 38700 0% 100% 1
10 ECOLE SCI PL MARRAKECH 38700 0% 100% 1

Journals


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class
1 JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING 37115 7% 2% 55
2 PARALLEL COMPUTING 24057 5% 2% 39
3 IEEE CONCURRENCY 19536 1% 7% 7
4 IEEE MICRO 18269 3% 2% 24
5 IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 15591 5% 1% 38
6 IEEE PARALLEL & DISTRIBUTED TECHNOLOGY 14012 1% 7% 5
7 LECTURE NOTES IN COMPUTER SCIENCE 12534 22% 0% 170
8 JOURNAL OF SUPERCOMPUTING 11349 3% 1% 25
9 JOURNAL OF SYSTEMS ARCHITECTURE 11211 2% 2% 19
10 ACM TRANSACTIONS ON COMPUTER SYSTEMS 10843 1% 3% 11

Author Key Words


Rank Term Chi square Shr. of publ. in
class containing
term		 Class's shr. of
term's tot. occurrences		 #P with
term in
class		 LCSH search Wikipedia search
1 DISTRIBUTED SHARED MEMORY 934960 8% 40% 60 Search DISTRIBUTED+SHARED+MEMORY Search DISTRIBUTED+SHARED+MEMORY
2 CACHE COHERENCE 681401 6% 39% 45 Search CACHE+COHERENCE Search CACHE+COHERENCE
3 SHARED MEMORY MULTIPROCESSORS 520918 4% 38% 35 Search SHARED+MEMORY+MULTIPROCESSORS Search SHARED+MEMORY+MULTIPROCESSORS
4 CACHE COHERENCE PROTOCOLS 237021 2% 44% 14 Search CACHE+COHERENCE+PROTOCOLS Search CACHE+COHERENCE+PROTOCOLS
5 COHERENCE PROTOCOL 174141 1% 50% 9 Search COHERENCE+PROTOCOL Search COHERENCE+PROTOCOL
6 FALSE SHARING 137591 1% 44% 8 Search FALSE+SHARING Search FALSE+SHARING
7 SCALABLE COHERENT INTERFACE 120934 1% 63% 5 Search SCALABLE+COHERENT+INTERFACE Search SCALABLE+COHERENT+INTERFACE
8 COMPILER DIRECTED CACHE COHERENCE 116100 0% 100% 3 Search COMPILER+DIRECTED+CACHE+COHERENCE Search COMPILER+DIRECTED+CACHE+COHERENCE
9 DIRECTORY CACHE 116100 0% 100% 3 Search DIRECTORY+CACHE Search DIRECTORY+CACHE
10 PREFETCHING STRATEGY 116100 0% 100% 3 Search PREFETCHING+STRATEGY Search PREFETCHING+STRATEGY

Core articles
The table includes core articles in the class. The following variables is taken into account for the relevance score of an article in a cluster c:
(1) Number of references referring to publications in the class.
(2) Share of total number of active references referring to publications in the class.
(3) Age of the article. New articles get higher score than old articles.
(4) Citation rate, normalized to year.


Rank Reference # ref.
in cl.		 Shr. of ref. in
cl.		 Citations
1 PRETE, CA , GIORGI, R , (1999) PSCR: A COHERENCE PROTOCOL FOR ELIMINATING PASSIVE SHARING IN SHARED-BUS SHARED-MEMORY MULTIPROCESSORS.IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS. VOL. 10. ISSUE 7. P. 742 -763 21 84% 3
2 FOGLIA, P , GIORGI, R , PRETE, CA , (2004) SIMULATION STUDY OF MEMORY PERFORMANCE OF SMP MULTIPROCESSORS RUNNING A TPC-W WORKLOAD.IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES. VOL. 151. ISSUE 2. P. 93 -109 17 74% 3
3 FOGLIA, P , GIORGI, R , PRETE, CA , (2005) REDUCING COHERENCE OVERHEAD AND BOOSTING PERFORMANCE OF HIGH-END SMP MULTIPROCESSORS RUNNING A DSS WORKLOAD.JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING. VOL. 65. ISSUE 3. P. 289 -306 12 86% 1
4 CEBRIAN, JM , FERNANDEZ-PASCUAL, R , JIMBOREAN, A , ACACIO, ME , ROS, A , (2017) A DEDICATED PRIVATE-SHARED CACHE DESIGN FOR SCALABLE MULTIPROCESSORS.CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE. VOL. 29. ISSUE 2. P. - 4 100% 1
5 GIORGI, R , PRETE, CA , FOGLIA, P , (2002) BOOSTING THE PERFORMANCE OF THREE-TIER WEB SERVERS DEPLOYING SMP ARCHITECTURE.WEB ENGINEERING AND PEER TO PEER COMPUTING. VOL. 2376. ISSUE . P. 134 -146 10 91% 0
6 LI, T , JOHN, LK , (2001) ADIR(P)NB: A COST-EFFECTIVE WAY TO IMPLEMENT FULL MAP DIRECTORY-BASED CACHE COHERENCE PROTOCOLS.IEEE TRANSACTIONS ON COMPUTERS. VOL. 50. ISSUE 9. P. 921 -934 9 90% 4
7 IOSEVICH, V , SCHUSTER, A , (2005) SOFTWARE DISTRIBUTED SHARED MEMORY: A VIA-BASED IMPLEMENTATION AND COMPARISON OF SEQUENTIAL CONSISTENCY WITH HOME-BASED LAZY RELEASE CONSISTENCY.SOFTWARE-PRACTICE & EXPERIENCE. VOL. 35. ISSUE 8. P. 755 -786 8 89% 1
8 GRAHN, H , STENSTROM, P , (2000) COMPARATIVE EVALUATION OF LATENCY-TOLERATING AND -REDUCING TECHNIQUES FOR HARDWARE-ONLY AND SOFTWARE-ONLY DIRECTORY PROTOCOLS.JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING. VOL. 60. ISSUE 7. P. 807 -834 9 90% 1
9 CHIOLA, G , CIACCIO, G , (2000) EFFICIENT PARALLEL PROCESSING ON LOW-COST CLUSTERS WITH GAMMA ACTIVE PORTS.PARALLEL COMPUTING. VOL. 26. ISSUE 2-3. P. 333-354 8 100% 8
10 LIU, YH , ZHU, MF , XIAO, LM , (2014) ELASTIC POINTER DIRECTORY ORGANIZATION FOR SCALABLE SHARED MEMORY MULTIPROCESSORS.JOURNAL OF SYSTEMS ENGINEERING AND ELECTRONICS. VOL. 25. ISSUE 1. P. 158-167 7 78% 0

Classes with closest relation at Level 1


Rank Class id link
1 20152 CONCURRENCY-PRACTICE AND EXPERIENCE//MESSAGE PASSING IN JAVA MPJ//GRIDIFICATION
2 32910 HPC MARKET//PARALLEL PROCESSING ON CLUSTERS//PARALLELISM MANAGEMENT
3 4186 BRANCH PREDICTION//THREAD LEVEL SPECULATION//ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
4 8578 SIGPLAN NOTICES//REMOTE PROCEDURE CALL//SOFTWARE-PRACTICE & EXPERIENCE
5 28607 MPI I O PROCESS//STAMPI//NETWORK BASED COMP
6 4952 PARALLELIZING COMPILERS//LOOP TRANSFORMATIONS//AUTOMATIC PARALLELIZATION
7 2703 NETWORK ON CHIP//NETWORK ON CHIP NOC//WORMHOLE ROUTING
8 13393 TRANSACTIONAL MEMORY//DATA RACES//RELAXED MEMORY MODELS
9 17680 PARMACS//SUPRENUM//PARALLEL COMPUTING
10 23399 DIVISIBLE LOADS//DIVISIBLE LOAD THEORY//DIVISIBLE LOAD SCHEDULING

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