Class information for: |
Basic class information |
ID | Publications | Average number of references |
Avg. shr. active ref. in WoS |
---|---|---|---|
2570 | 3228 | 19.6 | 30% |
Classes in level above (level 3) |
ID, lev. above |
Publications | Label for level above |
---|---|---|
372 | 29885 | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//COMPUTER SCIENCE, HARDWARE & ARCHITECTURE//JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS |
Classes in level below (level 1) |
ID, lev. below | Publications | Label for level below |
---|---|---|
7483 | 1283 | FLOORPLANNING//PHYSICAL DESIGN//PLACEMENT |
10806 | 965 | COOLING SCHEDULES//FINITE TIME PERFORMANCE//ADAPTIVE COOLING SCHEDULE |
11884 | 882 | CHANNEL ROUTING//OVER THE CELL ROUTING//VLSI LAYOUT |
33057 | 98 | DIRECT EXECUTION//IBM CELL BROADBAND ENGINE//LONGLEY RICE MODEL |
Terms with highest relevance score |
Rank | Term | Type of term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|---|
1 | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | Journal | 90 | 13% | 19% | 621 |
2 | FLOORPLANNING | Author keyword | 51 | 41% | 3% | 95 |
3 | PHYSICAL DESIGN | Author keyword | 46 | 32% | 4% | 121 |
4 | CHANNEL ROUTING | Author keyword | 41 | 60% | 1% | 44 |
5 | GLOBAL ROUTING | Author keyword | 39 | 47% | 2% | 61 |
6 | PLACEMENT | Author keyword | 25 | 17% | 4% | 130 |
7 | INTEGRATION-THE VLSI JOURNAL | Journal | 17 | 14% | 4% | 117 |
8 | VLSI LAYOUT | Author keyword | 17 | 38% | 1% | 36 |
9 | ROUTABILITY | Author keyword | 17 | 46% | 1% | 27 |
10 | DETAILED ROUTING | Author keyword | 15 | 45% | 1% | 26 |
Web of Science journal categories |
Author Key Words |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
LCSH search | Wikipedia search |
---|---|---|---|---|---|---|---|
1 | FLOORPLANNING | 51 | 41% | 3% | 95 | Search FLOORPLANNING | Search FLOORPLANNING |
2 | PHYSICAL DESIGN | 46 | 32% | 4% | 121 | Search PHYSICAL+DESIGN | Search PHYSICAL+DESIGN |
3 | CHANNEL ROUTING | 41 | 60% | 1% | 44 | Search CHANNEL+ROUTING | Search CHANNEL+ROUTING |
4 | GLOBAL ROUTING | 39 | 47% | 2% | 61 | Search GLOBAL+ROUTING | Search GLOBAL+ROUTING |
5 | PLACEMENT | 25 | 17% | 4% | 130 | Search PLACEMENT | Search PLACEMENT |
6 | VLSI LAYOUT | 17 | 38% | 1% | 36 | Search VLSI+LAYOUT | Search VLSI+LAYOUT |
7 | ROUTABILITY | 17 | 46% | 1% | 27 | Search ROUTABILITY | Search ROUTABILITY |
8 | DETAILED ROUTING | 15 | 45% | 1% | 26 | Search DETAILED+ROUTING | Search DETAILED+ROUTING |
9 | RENTS RULE | 13 | 46% | 1% | 22 | Search RENTS+RULE | Search RENTS+RULE |
10 | FINE GRAIN RECONFIGURABLE VLSI | 12 | 86% | 0% | 6 | Search FINE+GRAIN+RECONFIGURABLE+VLSI | Search FINE+GRAIN+RECONFIGURABLE+VLSI |
Key Words Plus |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | PROGRAMMABLE GATE ARRAYS | 11 | 33% | 1% | 29 |
2 | GLOBAL ROUTER | 11 | 78% | 0% | 7 |
3 | HILL CLIMBING ALGORITHMS | 9 | 83% | 0% | 5 |
4 | REGION QUERIES | 8 | 100% | 0% | 5 |
5 | ROUTER | 8 | 16% | 1% | 44 |
6 | COOLING SCHEDULES | 7 | 48% | 0% | 11 |
7 | REDUCTION DESIGN | 6 | 71% | 0% | 5 |
8 | BUILDING BLOCK LAYOUT | 6 | 100% | 0% | 4 |
9 | LIST QUAD TREES | 6 | 100% | 0% | 4 |
10 | ROUTABILITY | 5 | 54% | 0% | 7 |
Journals |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 90 | 13% | 19% | 621 |
2 | INTEGRATION-THE VLSI JOURNAL | 17 | 14% | 4% | 117 |
3 | ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS | 3 | 12% | 1% | 21 |
Reviews |
Title | Publ. year | Cit. | Active references |
% act. ref. to same field |
---|---|---|---|---|
RECENT DIRECTIONS IN NETLIST PARTITIONING - A SURVEY | 1995 | 209 | 34 | 68% |
SIMULATED ANNEALING - A TOOL FOR OPERATIONAL-RESEARCH | 1990 | 315 | 17 | 65% |
A survey of simulated annealing as a tool for single and multiobjective optimization | 2006 | 116 | 64 | 22% |
Physical limits of silicon transistors and circuits | 2005 | 34 | 44 | 25% |
Microminiature packaging and integrated circuitry: The work of E. F. Rent, with an application to on-chip interconnection requirements | 2005 | 10 | 38 | 53% |
Stochastic optimization: a review | 2002 | 39 | 58 | 16% |
NEW APPROACHES FOR HEURISTIC-SEARCH - A BILATERAL LINKAGE WITH ARTIFICIAL-INTELLIGENCE | 1989 | 102 | 10 | 30% |
Tutorial on VLSI partitioning | 2000 | 3 | 30 | 77% |
RECENT ADVANCES IN VLSI LAYOUT | 1990 | 37 | 41 | 66% |
Mining in chemometrics | 2008 | 43 | 35 | 6% |
Address terms |
Rank | Address term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | COMPUTAT METHODS NAT SCI | 3 | 100% | 0.1% | 3 |
2 | PLACEMENT TECHNOL GRP | 3 | 100% | 0.1% | 3 |
3 | TORONTO TECHNOL | 3 | 100% | 0.1% | 3 |
4 | INT ENVIRONM ENGN | 2 | 44% | 0.1% | 4 |
5 | DESIGN PROD GRP | 2 | 67% | 0.1% | 2 |
6 | IND POWER | 2 | 67% | 0.1% | 2 |
7 | PROMOT DEV OFF | 2 | 67% | 0.1% | 2 |
8 | SIMULAT OPTIMIZAT | 2 | 25% | 0.2% | 7 |
9 | VLSI SYST DESIGN | 2 | 33% | 0.1% | 4 |
10 | BEIJING SOFTWARE | 1 | 100% | 0.1% | 2 |
Related classes at same level (level 2) |