Class information for: |
Basic class information |
ID | Publications | Average number of references |
Avg. shr. active ref. in WoS |
---|---|---|---|
8992 | 1130 | 24.7 | 25% |
Classes in level above (level 2) |
ID, lev. above |
Publications | Label for level above |
---|---|---|
923 | 10486 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//HIGH LEVEL SYNTHESIS |
Terms with highest relevance score |
Rank | Term | Type of term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|---|
1 | RECONFIGURABLE COMPUTING | Author keyword | 24 | 19% | 10% | 111 |
2 | INSTRUCTION SET EXTENSION ISE | Author keyword | 15 | 88% | 1% | 7 |
3 | ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS | Journal | 12 | 24% | 4% | 43 |
4 | EXTENSIBLE PROCESSOR | Author keyword | 8 | 70% | 1% | 7 |
5 | REMUS II | Author keyword | 8 | 100% | 0% | 5 |
6 | RECONFIGURABLE ARCHITECTURES | Author keyword | 6 | 14% | 3% | 38 |
7 | COARSE GRAINED RECONFIGURABLE ARCHITECTURE | Author keyword | 6 | 41% | 1% | 11 |
8 | COARSE GRAIN RECONFIGURABLE HARDWARE | Author keyword | 6 | 100% | 0% | 4 |
9 | CUSTOM INSTRUCTION | Author keyword | 5 | 38% | 1% | 10 |
10 | COARSE GRAINED RECONFIGURABLE ARRAYS | Author keyword | 5 | 55% | 1% | 6 |
Web of Science journal categories |
Author Key Words |
Key Words Plus |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | EXTENSIBLE PROCESSORS | 31 | 92% | 1% | 12 |
2 | SET EXTENSIONS | 5 | 60% | 1% | 6 |
3 | LOGIC EMULATION | 5 | 63% | 0% | 5 |
4 | FPGAS | 5 | 14% | 3% | 31 |
5 | CUSTOM INSTRUCTIONS | 4 | 75% | 0% | 3 |
6 | INSTRUCTION SET CUSTOMIZATION | 3 | 60% | 0% | 3 |
7 | 2 D CONVOLVERS | 2 | 67% | 0% | 2 |
8 | CONFIGURABLE LOGIC | 2 | 67% | 0% | 2 |
9 | MULTI FPGA SYSTEMS | 2 | 67% | 0% | 2 |
10 | PACT XPP | 2 | 67% | 0% | 2 |
Journals |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS | 12 | 24% | 4% | 43 |
Reviews |
Title | Publ. year | Cit. | Active references |
% act. ref. to same field |
---|---|---|---|---|
Reconfigurable computing: A survey of systems and software | 2002 | 435 | 25 | 28% |
Reconfigurable computing: architectures and design methods | 2005 | 95 | 22 | 59% |
Reconfigurable computing for digital signal processing: A survey | 2001 | 110 | 22 | 45% |
Modern development methods and tools for embedded reconfigurable systems: A survey | 2010 | 8 | 95 | 55% |
The roles of FPGA's in reprogrammable systems | 1998 | 133 | 6 | 33% |
A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing | 2014 | 1 | 60 | 17% |
Sensor Systems Based on FPGAs and Their Applications: A Survey | 2012 | 8 | 10 | 20% |
Run-time reconfigurable systems for digital signal processing applications: A survey | 2005 | 13 | 14 | 50% |
CUSTOM COMPUTING MACHINES - AN INTRODUCTION | 1995 | 11 | 3 | 100% |
MODERN ARCHITECTURES FOR EMBEDDED RECONFIGURABLE SYSTEMS - A SURVEY | 2009 | 0 | 22 | 64% |
Address terms |
Rank | Address term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | SECT ELECT COMP | 3 | 39% | 0.6% | 7 |
2 | NSF HIGH PERFORMANCE RECONFIGURABLE COMP CHRE | 3 | 35% | 0.7% | 8 |
3 | PROCESSOR ARCHITECTURE | 2 | 36% | 0.4% | 4 |
4 | ITIV | 1 | 31% | 0.4% | 4 |
5 | ELECT COMP SECT | 1 | 100% | 0.2% | 2 |
6 | INTEGRATED SIGNAL PROC SYST ISS | 1 | 50% | 0.2% | 2 |
7 | LAM COMP ARCHITECTURE MICROELETRON | 1 | 100% | 0.2% | 2 |
8 | XILINX S | 1 | 50% | 0.2% | 2 |
9 | EMBEDDED COMP SYST | 1 | 12% | 1.0% | 11 |
10 | ELECT ENGN ELECT SYST | 1 | 40% | 0.2% | 2 |
Related classes at same level (level 1) |
Rank | Relatedness score | Related classes |
---|---|---|
1 | 0.0000217445 | HARDWARE SOFTWARE PARTITIONING//HARDWARE SOFTWARE COSYNTHESIS//PROCESSOR SYNTHESIS |
2 | 0.0000187877 | SYST LEVEL INTEGRAT GRP//DYNAMIC PARTIAL RECONFIGURATION DPR//DYNAMICALLY PROGRAMMABLE GATE ARRAY |
3 | 0.0000152875 | BITWIDTH//WORD LENGTH OPTIMIZATION//BIT WIDTH ALLOCATION |
4 | 0.0000118230 | ELECT TELECOMMUN INFORMAT IEETA//DIGITAL SIGNAL PROCESSING SLICE//HAMMING WEIGHT COMPARATOR |
5 | 0.0000116483 | STREAMIT//SYNCHRONOUS DATAFLOW//DESIGN AUTOMATION FOR EMBEDDED SYSTEMS |
6 | 0.0000107745 | HIGH LEVEL SYNTHESIS//BEHAVIORAL SYNTHESIS//MODULE SELECTION |
7 | 0.0000099260 | FLOORPLANNING//PHYSICAL DESIGN//PLACEMENT |
8 | 0.0000091048 | PARALLEL MEMORY//STORAGE SCHEMES//SUBWORD PARALLELISM |
9 | 0.0000079055 | CREPING//CORE CENTRIC//SPECIAL PURPOSE PROCESSOR |
10 | 0.0000070136 | SOFTWARE RADIO//SOFTWARE ANTENNA//DSP DEV J AN |