Class information for: |
Basic class information |
ID | Publications | Average number of references |
Avg. shr. active ref. in WoS |
---|---|---|---|
8194 | 1209 | 18.8 | 36% |
Classes in level above (level 2) |
ID, lev. above |
Publications | Label for level above |
---|---|---|
1040 | 9640 | JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//SINGLE EVENT UPSET SEU |
Terms with highest relevance score |
Rank | Term | Type of term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|---|
1 | BUILT IN REDUNDANCY ANALYSIS BIRA | Author keyword | 23 | 100% | 1% | 10 |
2 | CATASTROPHIC FAULT PATTERNS | Author keyword | 17 | 100% | 1% | 8 |
3 | CRITICAL AREA | Author keyword | 14 | 43% | 2% | 26 |
4 | BUILT IN SELF REPAIR BISR | Author keyword | 10 | 52% | 1% | 14 |
5 | MARCH TEST | Author keyword | 9 | 44% | 1% | 16 |
6 | MEMORY TESTING | Author keyword | 9 | 24% | 3% | 33 |
7 | MEMORY REPAIR | Author keyword | 8 | 52% | 1% | 11 |
8 | PATTERN SENSITIVE FAULTS | Author keyword | 7 | 53% | 1% | 10 |
9 | SECT COMP ENGN | Address | 6 | 80% | 0% | 4 |
10 | DEGRADABLE VLSI ARRAY | Author keyword | 6 | 71% | 0% | 5 |
Web of Science journal categories |
Author Key Words |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
LCSH search | Wikipedia search |
---|---|---|---|---|---|---|---|
1 | BUILT IN REDUNDANCY ANALYSIS BIRA | 23 | 100% | 1% | 10 | Search BUILT+IN+REDUNDANCY+ANALYSIS+BIRA | Search BUILT+IN+REDUNDANCY+ANALYSIS+BIRA |
2 | CATASTROPHIC FAULT PATTERNS | 17 | 100% | 1% | 8 | Search CATASTROPHIC+FAULT+PATTERNS | Search CATASTROPHIC+FAULT+PATTERNS |
3 | CRITICAL AREA | 14 | 43% | 2% | 26 | Search CRITICAL+AREA | Search CRITICAL+AREA |
4 | BUILT IN SELF REPAIR BISR | 10 | 52% | 1% | 14 | Search BUILT+IN+SELF+REPAIR+BISR | Search BUILT+IN+SELF+REPAIR+BISR |
5 | MARCH TEST | 9 | 44% | 1% | 16 | Search MARCH+TEST | Search MARCH+TEST |
6 | MEMORY TESTING | 9 | 24% | 3% | 33 | Search MEMORY+TESTING | Search MEMORY+TESTING |
7 | MEMORY REPAIR | 8 | 52% | 1% | 11 | Search MEMORY+REPAIR | Search MEMORY+REPAIR |
8 | PATTERN SENSITIVE FAULTS | 7 | 53% | 1% | 10 | Search PATTERN+SENSITIVE+FAULTS | Search PATTERN+SENSITIVE+FAULTS |
9 | DEGRADABLE VLSI ARRAY | 6 | 71% | 0% | 5 | Search DEGRADABLE+VLSI+ARRAY | Search DEGRADABLE+VLSI+ARRAY |
10 | SEMICONDUCTOR YIELD | 6 | 71% | 0% | 5 | Search SEMICONDUCTOR+YIELD | Search SEMICONDUCTOR+YIELD |
Key Words Plus |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | CRITICAL AREA | 15 | 71% | 1% | 12 |
2 | FUNCTIONAL FAULTS | 15 | 77% | 1% | 10 |
3 | PATTERN SENSITIVE FAULTS | 15 | 73% | 1% | 11 |
4 | RANDOM ACCESS MEMORIES | 13 | 26% | 3% | 42 |
5 | AREA FAULT CLUSTERS | 12 | 86% | 0% | 6 |
6 | MANUFACTURING YIELD | 12 | 86% | 0% | 6 |
7 | INFRASTRUCTURE IP | 10 | 57% | 1% | 12 |
8 | CRITICAL AREA COMPUTATION | 9 | 83% | 0% | 5 |
9 | IC FABRICATION | 9 | 83% | 0% | 5 |
10 | INTEGRATED CIRCUIT YIELD | 9 | 83% | 0% | 5 |
Journals |
Reviews |
Title | Publ. year | Cit. | Active references |
% act. ref. to same field |
---|---|---|---|---|
Defect tolerance in VLSI circuits: Techniques and yield analysis | 1998 | 73 | 51 | 86% |
A review of yield modelling techniques for semiconductor manufacturing | 2006 | 31 | 29 | 66% |
An overview of manufacturing yield and reliability modeling for semiconductor products | 1999 | 51 | 37 | 51% |
LARGE-AREA FAULT CLUSTERS AND FAULT TOLERANCE IN VLSI CIRCUITS - A REVIEW | 1989 | 30 | 23 | 100% |
HIGH-YIELD ASSEMBLY OF MULTICHIP MODULES THROUGH KNOWN-GOOD ICS AND EFFECTIVE TEST STRATEGIES | 1992 | 31 | 26 | 19% |
A REVIEW OF FAULT-TOLERANT TECHNIQUES FOR THE ENHANCEMENT OF INTEGRATED-CIRCUIT YIELD | 1986 | 41 | 32 | 56% |
COMPUTER-AIDED-DESIGN FOR VLSI CIRCUIT MANUFACTURABILITY | 1990 | 47 | 80 | 15% |
WAFER LEVEL SYSTEM INTEGRATION - A REVIEW | 1989 | 3 | 17 | 35% |
SOURCES OF FAILURES AND YIELD IMPROVEMENT FOR VLSI AND RESTRUCTURABLE INTERCONNECTS FOR RVLSI AND WSI .1. SOURCES OF FAILURES AND YIELD IMPROVEMENT FOR VLSI | 1984 | 36 | 19 | 21% |
Microelectronics research in chemical engineering: A metaphorical view | 2002 | 0 | 65 | 2% |
Address terms |
Rank | Address term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | SECT COMP ENGN | 6 | 80% | 0.3% | 4 |
2 | DEFECT REDUCT TECHNOL | 3 | 100% | 0.2% | 3 |
3 | INTEGRATED CIRCUITS DESIGN TEST | 3 | 50% | 0.3% | 4 |
4 | ADV RELIABLE SYST | 3 | 60% | 0.2% | 3 |
5 | VERY LARGE SCALE INTEGRAT COMP AIDED DESIGN | 3 | 60% | 0.2% | 3 |
6 | ADV TEST CHIP | 1 | 100% | 0.2% | 2 |
7 | ALGORITHM LANGUAGES | 1 | 100% | 0.2% | 2 |
8 | EMBEDDED TEST REPAIR PROGRAM | 1 | 100% | 0.2% | 2 |
9 | HIGH PERFORMANCE EMBEDDED SYST | 1 | 12% | 0.8% | 10 |
10 | ACTL | 1 | 50% | 0.1% | 1 |
Related classes at same level (level 1) |
Rank | Relatedness score | Related classes |
---|---|---|
1 | 0.0000125317 | DATA RETENTION TIME//VOLTAGE DOWN CONVERTER//FERROELECTRIC MEMORY |
2 | 0.0000100374 | COMPUTER MEMORY SYSTEMS//HIGH DIMENSIONAL PARITY CHECK CODE//PARALLEL DECODING ARCHITECTURE |
3 | 0.0000098757 | SYST LEVEL INTEGRAT GRP//DYNAMIC PARTIAL RECONFIGURATION DPR//DYNAMICALLY PROGRAMMABLE GATE ARRAY |
4 | 0.0000091051 | ELLIPSOIDAL TECHNIQUE//DESIGN CENTERING//PARAMETRIC YIELD |
5 | 0.0000090414 | ITERATIVE LOGIC ARRAYS//C TESTABILITY//CELL FAULT MODEL |
6 | 0.0000085271 | TRANSITION FAULTS//FUNCTIONAL BROADSIDE TESTS//JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS |
7 | 0.0000085189 | DIRECT EXECUTION//IBM CELL BROADBAND ENGINE//LONGLEY RICE MODEL |
8 | 0.0000076877 | QUANTUM SENSITIVITY LIMIT//ACTIVE QUANTUM FILTER//LARGE AREA FILMS |
9 | 0.0000074796 | THERMAL ENGN TECHNOL//J AN MARINE SCI TECHNOL//INP WAFERS |
10 | 0.0000067834 | JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS//ANALOG FAULT DIAGNOSIS//LOOPBACK TEST |