Class information for: |
Basic class information |
ID | Publications | Average number of references |
Avg. shr. active ref. in WoS |
---|---|---|---|
31732 | 119 | 24.5 | 25% |
Classes in level above (level 2) |
ID, lev. above |
Publications | Label for level above |
---|---|---|
923 | 10486 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//HIGH LEVEL SYNTHESIS |
Terms with highest relevance score |
Rank | Term | Type of term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|---|
1 | BITWIDTH | Author keyword | 5 | 63% | 4% | 5 |
2 | WORD LENGTH OPTIMIZATION | Author keyword | 3 | 40% | 5% | 6 |
3 | BIT WIDTH ALLOCATION | Author keyword | 3 | 60% | 3% | 3 |
4 | FIXED POINT ARITHMETIC | Author keyword | 1 | 10% | 11% | 13 |
5 | RANGE ANALYSIS | Author keyword | 1 | 14% | 6% | 7 |
6 | ARITHMETIC TRANSFORM | Author keyword | 1 | 27% | 3% | 3 |
7 | BIT WIDTH OPTIMIZATION | Author keyword | 1 | 50% | 1% | 1 |
8 | DEP ENG INFORMAT | Address | 1 | 50% | 1% | 1 |
9 | DIGITAL SIGNAL PROCESSING SYSTEMS | Author keyword | 1 | 50% | 1% | 1 |
10 | DYNAMIC ERROR ANALYSIS | Author keyword | 1 | 50% | 1% | 1 |
Web of Science journal categories |
Author Key Words |
Key Words Plus |
Rank | Web of Science journal category | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | WORD LENGTH OPTIMIZATION | 12 | 50% | 15% | 18 |
2 | BIT WIDTH OPTIMIZATION | 3 | 45% | 4% | 5 |
3 | SIGNAL PROCESSING SYSTEMS | 3 | 31% | 7% | 8 |
4 | BIT WIDTH ALLOCATION | 1 | 50% | 2% | 2 |
5 | FFT UNITS | 1 | 100% | 2% | 2 |
6 | ROUNDOFF ERROR | 0 | 33% | 1% | 1 |
7 | HARDWARE ACCELERATOR | 0 | 25% | 1% | 1 |
8 | ARRAY DEPENDENCE ANALYSIS | 0 | 20% | 1% | 1 |
9 | DATAPATH OPTIMIZATION | 0 | 100% | 1% | 1 |
10 | FIR EQUALIZER | 0 | 100% | 1% | 1 |
Journals |
Reviews |
Address terms |
Rank | Address term | Relevance score (tfidf) |
Class's shr. of term's tot. occurrences |
Shr. of publ. in class containing term |
Num. of publ. in class |
---|---|---|---|---|---|
1 | DEP ENG INFORMAT | 1 | 50% | 0.8% | 1 |
2 | ENSSAT ENGN | 1 | 50% | 0.8% | 1 |
3 | PLICAT SPECIF PROD | 1 | 50% | 0.8% | 1 |
4 | POLYTECH BORDEAUX IPB | 1 | 50% | 0.8% | 1 |
5 | CHAIR ELECT ENGN COMP SYST | 1 | 19% | 2.5% | 3 |
6 | COMP ARCHITECTURE DIGITAL TECH | 0 | 33% | 0.8% | 1 |
7 | EQUIPE CAIRN | 0 | 33% | 0.8% | 1 |
8 | BORDEAUX POLYTECH | 0 | 25% | 0.8% | 1 |
9 | ESCUELA POLITECNIA SUPER | 0 | 25% | 0.8% | 1 |
10 | FRAUNHOFER COMMUN | 0 | 25% | 0.8% | 1 |
Related classes at same level (level 1) |
Rank | Relatedness score | Related classes |
---|---|---|
1 | 0.0000246671 | COMPUTER ARITHMETIC//CORDIC//LOGARITHMIC NUMBER SYSTEM |
2 | 0.0000232860 | DELAYED LMS ALGORITHM//DLMS ALGORITHM//FUTURE WIRELESS COMMUNICATION |
3 | 0.0000225301 | APPROXIMATE SIGNAL PROCESSING//FULL SEARCH EQUIVALENT ALGORITHM//INCREMENTAL REFINEMENT OF COMPUTATION |
4 | 0.0000176951 | HARDWARE SOFTWARE PARTITIONING//HARDWARE SOFTWARE COSYNTHESIS//PROCESSOR SYNTHESIS |
5 | 0.0000152875 | RECONFIGURABLE COMPUTING//INSTRUCTION SET EXTENSION ISE//ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS |
6 | 0.0000132528 | POWER ESTIMATION//SWITCHING ACTIVITY//BUS ENCODING |
7 | 0.0000127753 | ROUNDOFF NOISE//ERROR SPECTRUM SHAPING//STATE SPACE DIGITAL FILTERS |
8 | 0.0000121738 | DESIGN ERROR DIAGNOSIS//PASS FAIL INFORMATION//WITT POLYNOMIAL |
9 | 0.0000100809 | HIGH LEVEL SYNTHESIS//BEHAVIORAL SYNTHESIS//MODULE SELECTION |
10 | 0.0000098632 | REED MULLER EXPANSIONS//FRENCH SING ORE//REED MULLER EXPANSION |