Class information for:
Level 1: THROUGH SILICON VIA TSV//3 D INTEGRATION//KEEP OUT ZONE KOZ

Basic class information
ID Publications Average number
of references		 Avg. shr. active
ref. in WoS
10680 976 21.9 49%


Bar chart of Publication_year

Last years might be incomplete

Classes in level above (level 2)


ID, lev.
above		 Publications Label for level above
688 12395 LEAD FREE SOLDER//SOLDERING & SURFACE MOUNT TECHNOLOGY//PB FREE SOLDER

Terms with highest relevance score


Rank Term Type of term Relevance score
(tfidf)		 Class's shr.
of term's tot.
occurrences		 Shr. of publ.
in class containing
term		 Num. of
publ. in
class
1 THROUGH SILICON VIA TSV Author keyword 77 46% 13% 124
2 3 D INTEGRATION Author keyword 33 42% 6% 62
3 KEEP OUT ZONE KOZ Author keyword 27 92% 1% 11
4 3 D IC Author keyword 17 47% 3% 27
5 THROUGH SILICON VIA Author keyword 15 25% 5% 52
6 CU CU BONDING Author keyword 13 69% 1% 11
7 THROUGH SILICON VIAS TSVS Author keyword 10 42% 2% 19
8 3 D ICS Author keyword 9 55% 1% 12
9 3 D INTEGRATED CIRCUITS Author keyword 8 50% 1% 11
10 CU BONDING Author keyword 7 67% 1% 6

Web of Science journal categories

Author Key Words


Rank Web of Science journal category Relevance score
(tfidf)		 Class's shr.
of term's tot.
occurrences		 Shr. of publ.
in class containing
term		 Num. of
publ. in
class		 LCSH search Wikipedia search
1 THROUGH SILICON VIA TSV 77 46% 13% 124 Search THROUGH+SILICON+VIA+TSV Search THROUGH+SILICON+VIA+TSV
2 3 D INTEGRATION 33 42% 6% 62 Search 3+D+INTEGRATION Search 3+D+INTEGRATION
3 KEEP OUT ZONE KOZ 27 92% 1% 11 Search KEEP+OUT+ZONE+KOZ Search KEEP+OUT+ZONE+KOZ
4 3 D IC 17 47% 3% 27 Search 3+D+IC Search 3+D+IC
5 THROUGH SILICON VIA 15 25% 5% 52 Search THROUGH+SILICON+VIA Search THROUGH+SILICON+VIA
6 CU CU BONDING 13 69% 1% 11 Search CU+CU+BONDING Search CU+CU+BONDING
7 THROUGH SILICON VIAS TSVS 10 42% 2% 19 Search THROUGH+SILICON+VIAS+TSVS Search THROUGH+SILICON+VIAS+TSVS
8 3 D ICS 9 55% 1% 12 Search 3+D+ICS Search 3+D+ICS
9 3 D INTEGRATED CIRCUITS 8 50% 1% 11 Search 3+D+INTEGRATED+CIRCUITS Search 3+D+INTEGRATED+CIRCUITS
10 CU BONDING 7 67% 1% 6 Search CU+BONDING Search CU+BONDING

Key Words Plus


Rank Web of Science journal category Relevance score
(tfidf)		 Class's shr.
of term's tot.
occurrences		 Shr. of publ.
in class containing
term		 Num. of
publ. in
class
1 3 D ICS 24 56% 3% 30
2 TSV 21 37% 5% 45
3 THROUGH SILICON 20 40% 4% 40
4 3 DIMENSIONAL INTEGRATED CIRCUITS 15 47% 2% 24
5 3D ICS 12 52% 2% 16
6 3D INTEGRATION 8 39% 2% 16
7 BUMPLESS INTERCONNECT 5 60% 1% 6
8 THROUGH SILICON VIAS 5 33% 1% 13
9 DEEP SUBMICROMETER INTERCONNECT 4 67% 0% 4
10 RELIABILITY CHALLENGES 4 56% 1% 5

Journals

Reviews


Title Publ. year Cit. Active
references		 % act. ref.
to same field
Development and Applications of 3-Dimensional Integration Nanotechnologies 2014 3 82 24%
3D integration review 2011 9 10 70%
Interconnect-Based Design Methodologies for Three-Dimensional Integrated Circuits 2009 35 32 44%
Recent progress in 3D integration technology 2015 0 11 100%
Review of wafer-level three-dimensional integration (3DI) using bumpless interconnects for tera-scale generation 2015 0 13 100%
Wafer-level three-dimensional integrated circuits (3D IC): Schemes and key technologies 2011 6 11 64%
Three-Dimensional and 2.5 Dimensional Interconnection Technology: State of the Art 2014 0 17 76%
Heterogeneous 2.5D integration on through silicon interposer 2015 0 43 63%
A Review of Recent Advances in Thermal Management in Three Dimensional Chip Stacks in Electronic Systems 2011 5 18 39%
3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration 2001 438 45 9%

Address terms


Rank Address term Relevance score
(tfidf)		 Class's shr.
of term's tot.
occurrences		 Shr. of publ.
in class containing
term		 Num. of
publ.
in class
1 ADV DESIGN TEAM 6 53% 0.8% 8
2 HIGH DENS INTERCONNECT GRP 4 75% 0.3% 3
3 SILICON TEST SOLUT 3 100% 0.3% 3
4 ASSEMBLY RELIABIL TECHNOL 3 45% 0.5% 5
5 MICROSYST MODULES COMPONENTS 2 32% 0.6% 6
6 CALIBRE 2 67% 0.2% 2
7 ULTRA PRECIS MECH SYST 2 67% 0.2% 2
8 ELECT SYST INTEGRAT TECHNOL 1 38% 0.3% 3
9 MUNICH 1 38% 0.3% 3
10 ICE CUBE 1 100% 0.2% 2

Related classes at same level (level 1)


Rank Relatedness score Related classes
1 0.0000123255 SELF ANNEALING//COPPER ELECTRODEPOSITION//COPPER ELECTROPLATING
2 0.0000106395 THERMAL PLACEMENT//DYNAMIC THERMAL MANAGEMENT DTM//TIME CONSTANT SPECTRUM
3 0.0000102111 WAFER BONDING//ANODIC BONDING//SILICON WAFER BONDING
4 0.0000088093 FLOORPLANNING//PHYSICAL DESIGN//PLACEMENT
5 0.0000070443 PLATED THROUGH HOLE//ENDICOTT ELECT PACKAGING//THREE DIMENSIONAL 3 D CHIP STACKING
6 0.0000068038 PROBE CARD//POROUS SILICON MICROMACHINING//VERTICAL ACTIVE DEVICES
7 0.0000065907 BENZOCYCLOBUTENE//MICROWAVE MICROSYST//NON PLANAR DEVICES
8 0.0000064184 SUBSTRATE NOISE//SUBSTRATE COUPLING//POWER SUPPLY NOISE
9 0.0000055951 WORMHOLE ROUTING//NETWORK ON CHIP//NETWORK ON CHIP NOC
10 0.0000055127 WIRE BONDING//ULTRASONIC WEDGE BONDING//MICROJOINING